Write and simulate
Edit Verilog, SystemVerilog, or VHDL. Create a clock and reset testbench scaffold, inspect waveforms, and interact with virtual hardware.
Allora FPGA desktop beta
RTL.
Custom Design Suite.
Full FPGA Build and Program Pipeline.
Write RTL, simulate a RISC-V system, inspect synthesized logic, and build for supported FPGAs. The tools share one desktop workspace and are connected through Allora Link.
In active development. Physical board programming has not yet been verified on hardware. Read the beta notes →
Allora Link
Connected design tools
Allora Link covers AI-assisted design, RISC-V system simulation, virtual hardware, memory and register generation, and timing analysis. Select a tool to see what it does and how its interface looks.
Allora Link uses third-party engines and cores, including Codex, Yosys, Verilator, PicoRV32, and SERV.
Workspace
The FPGA workflow in one desktop app
Allora Link sits alongside the standard FPGA workflow: editing, simulation, synthesis, pin mapping, bitstream generation, and programming.
Map and migrate
Assign buses with a preview and undo. Move a design into a separate board project with the Board Migration Assistant, then review any unresolved mappings.
Build and inspect
Synthesize, place and route, and pack bitstreams with the open toolchain. Reuse cached synthesis results, and review timing, artifact details, and resource and frequency trends in Build History.
Projects and conversations
Publish projects to GitHub, return to saved AI conversations, and move between sections with the shared dock. Serial Monitor and Live Register Shell are available in Program.
Board catalog
Supported FPGA boards
The catalog lists boards with open build flows and a larger set of pin mappings. Listing a board describes software support only. It does not establish that physical programming has been verified.
Explore FPGA boards… open build entries and … pin-mapping entries
Open build flowPin mapping
No boards match that search.
Beta
About the beta
Allora is a free app under active development. Features are still changing, and no board’s programming flow has been fully verified on physical hardware yet. A successful build or simulation does not guarantee a working board program.
When downloads open, test Allora with a supported board. Report what worked and what did not. Include your board and revision, macOS version, the steps you followed, and relevant logs so the result can be reproduced. Tester feedback helps Allora improve.
Use the feedback form below to send your report.
Allora FPGA for macOS
Installer not yet available
The macOS installer is being prepared. Download availability and setup requirements will appear here when it is ready.
Physical programming has not yet been verified on hardware.
Each workflow requires its respective FPGA toolchain. AI Design Studio requires provider setup and sign-in.Feedback
Send feedback
Include what you were doing, the board and revision if relevant, your macOS version, the steps you followed, and any logs. Screenshots are checked before they are sent.